1. Field of the Invention
This invention generally relates to a gate driver circuit and, more particularly, to an integrated gate driver circuit for a liquid crystal display.
2. Description of the Related Art
A liquid crystal display 9 generally includes a pixel matrix 91, a plurality of gate driver circuits 92 and a plurality of source driver circuits 93, as shown in FIG. 1a. The pixel matrix 91 includes a plurality of gate lines, a plurality of data lines and pixels (not shown) located at the crossovers of the gate lines and the data lines. Each gate driver circuit 92 is coupled to a row of pixels through a gate line for sequentially providing a scanning signal to the pixel matrix 91. The source driver circuit 93 is coupled to a column of pixels for providing gray scales to be displayed to every pixels enabled by the scanning signal.
In order to improve the images displayed by a liquid crystal display, the resolution of the liquid crystal display is increased rapidly. Therefore, the number of driver circuits is increased and the manufacturing cost is also increase at the same time. Please refer to FIG. 1b, it has been known that simultaneously forming the gate driver circuits and the pixel matrix 91 onto one substrate, called integrated gate driver circuit 92′, can reduce the manufacturing cost. However, because great numbers of gate lines, data lines and pixels have to be formed simultaneously on one substrate, limited space is available for forming the gate driver circuits thereon. Therefore, the structure of gate driver circuits 92′ should be designed as simple as possible thereby increasing the manufacturing yield.
U.S. Pat. No. 5,222,082, entitled “SHIFT REGISTER USEFUL AS A SELECT LINE SCANNER FOR LIQUID CRYSTAL DISPLAY”, disclosed a conventional integrated gate driver circuit includes a plurality of driving stages cascaded in series. Each driving stage includes an input terminal, an output terminal and an output circuit. The output circuit is for switching the voltage of the output terminal between high and low states. A first node switches the output terminal in response to an input signal, and a second node keeps the output terminal low between the input pulse and a clocking pulse. However, since each driving stage of the shift register still includes six thin film transistors, the shift register has complicated structure and needs larger manufacturing space.
Accordingly, the present invention further provides an integrated gate driver circuit, which can significantly reduce the complexity of circuit structure, manufacturing space and manufacturing cost.